HAL  v4.5.0-83-g30c8f0afc
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
hal::SimulationInput Member List

This is the complete list of members for hal::SimulationInput, including all inherited members.

add_clock(const Clock &clk)hal::SimulationInput
add_gates(const std::vector< Gate * > &gates)hal::SimulationInput
clear()hal::SimulationInput
compute_net_groups()hal::SimulationInput
contains_gate(const Gate *g) consthal::SimulationInput
DirectionType enum namehal::SimulationInput
dump(std::string filename=std::string()) consthal::SimulationInput
get_clocks() consthal::SimulationInputinline
get_gates() consthal::SimulationInput
get_input_nets() consthal::SimulationInput
get_net_groups() consthal::SimulationInputinline
get_output_nets() consthal::SimulationInput
get_partial_netlist_nets() consthal::SimulationInput
has_gates() consthal::SimulationInput
InputOnly enum valuehal::SimulationInput
is_clock(const Net *n) consthal::SimulationInput
is_input_net(const Net *n) consthal::SimulationInput
is_no_clock_used() consthal::SimulationInput
is_ready() consthal::SimulationInput
Mixed enum valuehal::SimulationInput
OutputOnly enum valuehal::SimulationInput
set_no_clock_used()hal::SimulationInput
SimulationInput()hal::SimulationInputinline
Undefined enum valuehal::SimulationInput