#include </home/runner/work/hal/hal/plugins/simulator/netlist_simulator_controller/include/netlist_simulator_controller/simulation_input.h>

Collaboration diagram for hal::SimulationInput:

Classes
struct	Clock

struct	NetGroup

Public Types
enum	DirectionType { Undefined , InputOnly , OutputOnly , Mixed }

Public Member Functions
	SimulationInput ()

bool	is_ready () const

bool	has_gates () const

bool	contains_gate (const Gate *g) const

const std::unordered_set< const Gate * > &	get_gates () const

const std::vector< Clock > &	get_clocks () const

bool	is_clock (const Net *n) const

void	set_no_clock_used ()

bool	is_no_clock_used () const

bool	is_input_net (const Net *n) const

void	add_clock (const Clock &clk)

void	add_gates (const std::vector< Gate * > &gates)

void	clear ()

const std::unordered_set< const Net * > &	get_input_nets () const

const std::vector< const Net * > &	get_output_nets () const

const std::vector< const Net * > &	get_partial_netlist_nets () const

void	dump (std::string filename=std::string()) const

void	compute_net_groups ()

const std::vector< NetGroup > &	get_net_groups () const

Detailed Description

The complete input of a simulation run, i.e., the simulated gates, the clocks, and the stimuli applied to the input nets.

Definition at line 55 of file simulation_input.h.

Member Enumeration Documentation

◆ DirectionType

enum hal::SimulationInput::DirectionType

Enumerator
Undefined
InputOnly
OutputOnly
Mixed

Definition at line 58 of file simulation_input.h.

Constructor & Destructor Documentation

◆ SimulationInput()

hal::SimulationInput::SimulationInput ( )

inline

Definition at line 104 of file simulation_input.h.

Member Function Documentation

◆ add_clock()

void hal::SimulationInput::add_clock ( const Clock & clk )

Adds a clock

Parameters

[in] clk reference to clock instance

Definition at line 66 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::add_clock_period().

◆ add_gates()

void hal::SimulationInput::add_gates ( const std::vector< Gate * > & gates )

Add gates to the simulation set that contains all gates that are considered during simulation. This function can only be called before the simulation has been initialized.

Parameters

[in] gates - The gates to add.

Definition at line 45 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::add_gates(), hal::LogicEvaluatorDialog::LogicEvaluatorDialog(), and hal::NetlistSimulatorController::NetlistSimulatorController().

◆ clear()

void hal::SimulationInput::clear ( )

Clear all internal container (gate set, input nets ...)

Definition at line 71 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::reset().

◆ compute_net_groups()

void hal::SimulationInput::compute_net_groups ( )

Group one-bit signals to multi-bit bus according to pingroups. Pingroups are only evaluated if all connected nets are part of the simulation. Module pingroups have priority before gate pingroups.

Definition at line 249 of file simulation_input.cpp.

References hal::SimulationInput::NetGroup::ascending, hal::SimulationInput::NetGroup::direction, hal::SimulationInput::NetGroup::gate, hal::SimulationInput::NetGroup::gate_pin_group, hal::Module::get_parent_module(), hal::GateType::get_pin_groups(), hal::Module::get_pin_groups(), hal::inout, InputOnly, Mixed, hal::SimulationInput::NetGroup::module_pin_group, hal::output, OutputOnly, and Undefined.

Referenced by hal::NetlistSimulatorController::compute_waveform_groups(), and hal::LogicEvaluatorDialog::LogicEvaluatorDialog().

◆ contains_gate()

bool hal::SimulationInput::contains_gate ( const Gate * g ) const

Checks whether a gate is part of the simulation set

Parameters

[in] g the gate

Returns: true if part, false otherwise

Definition at line 40 of file simulation_input.cpp.

◆ dump()

void hal::SimulationInput::dump ( std::string filename = std::string() ) const

Dump content of simulation input instance to file or stderr if no filename given

Parameters

filename name of file to be created

Definition at line 121 of file simulation_input.cpp.

References log_warning.

Referenced by hal::DummyEngine::setSimulationInput().

◆ get_clocks()

const std::vector<Clock>& hal::SimulationInput::get_clocks ( ) const

inline

Returns the clock(s) set up for simulation

Returns: reference to clock(s)

Definition at line 135 of file simulation_input.h.

Referenced by hal::NetlistSimulatorController::get_input_column_headers(), hal::NetlistSimulatorController::persist(), and hal::NetlistSimulatorController::run_simulation().

◆ get_gates()

const std::unordered_set< const Gate * > & hal::SimulationInput::get_gates ( ) const

Returns the gates from simulation set

Returns: reference to gate set

Definition at line 54 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::get_gates(), hal::NetlistSimulatorController::persist(), and hal::verilator::VerilatorEngine::setSimulationInput().

◆ get_input_nets()

const std::unordered_set< const Net * > & hal::SimulationInput::get_input_nets ( ) const

Get all nets that are considered inputs, i.e., not driven by a gate in the simulation set or global inputs.

Returns: The input nets.

Definition at line 91 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::add_gates(), hal::NetlistSimulatorController::get_input_column_headers(), hal::NetlistSimulatorController::get_input_nets(), hal::NetlistSimulatorController::handleOpenInputFile(), hal::LogicEvaluatorDialog::LogicEvaluatorDialog(), hal::SimulationThread::run(), and hal::NetlistSimulatorController::run_simulation().

◆ get_net_groups()

const std::vector<NetGroup>& hal::SimulationInput::get_net_groups ( ) const

inline

Get groups computed in method above.

Returns: Vector of groups.

Definition at line 219 of file simulation_input.h.

Referenced by hal::NetlistSimulatorController::get_input_column_headers(), hal::NetlistSimulatorController::load_waveform_groups(), and hal::LogicEvaluatorDialog::LogicEvaluatorDialog().

◆ get_output_nets()

const std::vector< const Net * > & hal::SimulationInput::get_output_nets ( ) const

Get all output nets of gates in the simulation set that have a destination outside of the set or that are global outputs.

Returns: The output nets.

Definition at line 96 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::get_output_nets(), and hal::LogicEvaluatorDialog::LogicEvaluatorDialog().

◆ get_partial_netlist_nets()

const std::vector< const Net * > & hal::SimulationInput::get_partial_netlist_nets ( ) const

Get all nets from the partial netlist.

Returns: The nets from partial netlist

Definition at line 101 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::get_partial_netlist_nets().

◆ has_gates()

bool hal::SimulationInput::has_gates ( ) const

Checks whether gates have been selected for simulation

Returns: true if at least one gate is in simulation set, false otherwise

Definition at line 86 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::add_gates(), and is_ready().

◆ is_clock()

bool hal::SimulationInput::is_clock ( const Net * n ) const

Tests whether net has been selected as clock

Parameters

[in] n pointer to net

Returns: true if net has been selected as clock, false otherwise

Definition at line 59 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::run_simulation().

◆ is_input_net()

bool hal::SimulationInput::is_input_net ( const Net * n ) const

Tests whether net is an input net

Parameters

[in] n pointer to net

Returns: true if net is input net, false otherwise

Definition at line 106 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::set_input().

◆ is_no_clock_used()

bool hal::SimulationInput::is_no_clock_used ( ) const

Check wether no clock signal will be automatically generated as simulation input. Either there is no clock present or the clock signal will be passed as normal waveform input.

Definition at line 116 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::is_no_clock_used().

◆ is_ready()

bool hal::SimulationInput::is_ready ( ) const

Checks whether essential data for simulation has been provided (gates, clock, input_nets)

Returns: true if essential data is present, false otherwise

Definition at line 81 of file simulation_input.cpp.

References has_gates().

◆ set_no_clock_used()

void hal::SimulationInput::set_no_clock_used ( )

Prepare simulation where no net is defined as clock input

Definition at line 111 of file simulation_input.cpp.

Referenced by hal::NetlistSimulatorController::set_no_clock_used().

The documentation for this class was generated from the following files:

plugins/simulator/netlist_simulator_controller/include/netlist_simulator_controller/simulation_input.h
plugins/simulator/netlist_simulator_controller/src/simulation_input.cpp

Classes

Public Types

Public Member Functions

Detailed Description

Member Enumeration Documentation

◆ DirectionType

Constructor & Destructor Documentation

◆ SimulationInput()

Member Function Documentation

◆ add_clock()

◆ add_gates()

◆ clear()

◆ compute_net_groups()

◆ contains_gate()

◆ dump()

◆ get_clocks()

◆ get_gates()

◆ get_input_nets()

◆ get_net_groups()

◆ get_output_nets()

◆ get_partial_netlist_nets()

◆ has_gates()

◆ is_clock()

◆ is_input_net()

◆ is_no_clock_used()

◆ is_ready()

◆ set_no_clock_used()