HAL  v4.5.0-83-g30c8f0afc
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
simulation_gate_sequential.cpp
Go to the documentation of this file.
2 
3 namespace hal
4 {
5  NetlistSimulator::SimulationGateSequential::SimulationGateSequential(const Gate* gate) : SimulationGate(gate)
6  {
7  }
8 } // namespace hal
Definition: defines.h:45