HAL  v4.5.0-83-g30c8f0afc
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
hal::VerilogWriter Class Reference

#include </home/runner/work/hal/hal/plugins/verilog_writer/include/verilog_writer/verilog_writer.h>

Inheritance diagram for hal::VerilogWriter:
Inheritance graph
Collaboration diagram for hal::VerilogWriter:
Collaboration graph

Public Member Functions

 VerilogWriter ()=default
 
 ~VerilogWriter ()=default
 
Result< std::monostate > write (Netlist *netlist, const std::filesystem::path &file_path) override
 
- Public Member Functions inherited from hal::NetlistWriter
 NetlistWriter ()=default
 
virtual ~NetlistWriter ()=default
 

Detailed Description

A netlist writer that serializes a netlist into gate-level Verilog.

Definition at line 49 of file verilog_writer.h.

Constructor & Destructor Documentation

◆ VerilogWriter()

hal::VerilogWriter::VerilogWriter ( )
default

◆ ~VerilogWriter()

hal::VerilogWriter::~VerilogWriter ( )
default

Member Function Documentation

◆ write()

Result< std::monostate > hal::VerilogWriter::write ( Netlist netlist,
const std::filesystem::path &  file_path 
)
overridevirtual

Write the netlist to a Verilog file at the provided location.

Parameters
[in]netlist- The netlist.
[in]file_path- The output path.
Returns
true on success, false otherwise.

Implements hal::NetlistWriter.

Definition at line 15 of file verilog_writer.cpp.

References ERR, ERR_APPEND, hal::Netlist::get_modules(), and OK.


The documentation for this class was generated from the following files: