HAL
configuration.h
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1 // MIT License
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3 // Copyright (c) 2019 Ruhr University Bochum, Chair for Embedded Security. All Rights reserved.
4 // Copyright (c) 2019 Marc Fyrbiak, Sebastian Wallat, Max Hoffmann ("ORIGINAL AUTHORS"). All rights reserved.
5 // Copyright (c) 2021 Max Planck Institute for Security and Privacy. All Rights reserved.
6 // Copyright (c) 2021 Jörn Langheinrich, Julian Speith, Nils Albartus, René Walendy, Simon Klix ("ORIGINAL AUTHORS"). All Rights reserved.
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25 
31 #pragma once
32 
33 #include "hal_core/defines.h"
38 
39 #include <set>
40 #include <unordered_set>
41 #include <vector>
42 
43 namespace hal
44 {
45  class Gate;
46  class Module;
47  class Grouping;
48  class Netlist;
49  class Net;
50  class GateType;
51 
52  namespace dataflow
53  {
61  {
68 
73 
78 
82  std::vector<u32> expected_sizes = {};
83 
87  std::vector<std::vector<Gate*>> known_gate_groups = {};
88 
92  std::vector<std::vector<Net*>> known_net_groups = {};
93 
97  std::set<const GateType*> gate_types = {};
98 
102  std::set<PinType> control_pin_types = {};
103 
107  bool enable_stages = false;
108 
113 
121 
128  Configuration& with_expected_sizes(const std::vector<u32>& sizes);
129 
141  Configuration& with_known_structures(const std::vector<Module*>& structures, bool overwrite = false);
142 
156  Configuration& with_known_structures(const std::vector<std::pair<Module*, std::vector<PinGroup<ModulePin>*>>>& structures, bool overwrite = false);
157 
169  Configuration& with_known_structures(const std::vector<Gate*>& structures, bool overwrite = false);
170 
184  Configuration& with_known_structures(const std::vector<std::pair<Gate*, std::vector<PinGroup<GatePin>*>>>& structures, bool overwrite = false);
185 
197  Configuration& with_known_structures(const std::unordered_set<const GateType*>& structures, bool overwrite = false);
198 
212  Configuration& with_known_structures(const std::unordered_map<const GateType*, std::vector<PinGroup<GatePin>*>>& structures, bool overwrite = false);
213 
224  Configuration& with_known_groups(const std::vector<Module*>& groups, bool overwrite = false);
225 
236  Configuration& with_known_groups(const std::vector<std::vector<Gate*>>& groups, bool overwrite = false);
237 
248  Configuration& with_known_groups(const std::vector<std::vector<u32>>& groups, bool overwrite = false);
249 
261  Configuration& with_known_groups(const std::unordered_map<u32, std::unordered_set<Gate*>>& groups, bool overwrite = false);
262 
272  Configuration& with_gate_types(const std::set<const GateType*>& types, bool overwrite = false);
273 
283  Configuration& with_gate_types(const std::set<GateTypeProperty>& type_properties, bool overwrite = false);
284 
294  Configuration& with_control_pin_types(const std::set<PinType>& types, bool overwrite = false);
295 
305 
312  Configuration& with_stage_identification(bool enable = true);
313 
320  Configuration& with_type_consistency(bool enable = true);
321  };
322  } // namespace dataflow
323 } // namespace hal
Definition: gate.h:58
quint32 u32
Configuration of a dataflow analysis run.
Definition: configuration.h:61
Configuration & with_flip_flops()
Use the default detection configuration for flip-flops.
std::vector< std::vector< Net * > > known_net_groups
Groups of nets that have been identified as word-level datapathes beforehand. Defaults to an empty ve...
Definition: configuration.h:92
std::vector< u32 > expected_sizes
Expected group sizes. Groups of these sizes will be prioritized. Defaults to an empty vector.
Definition: configuration.h:82
Configuration & with_type_consistency(bool enable=true)
Enable type consistency as part of dataflow analysis when deciding whether two gates are allowed to m...
std::set< const GateType * > gate_types
The gate types to be grouped by dataflow analysis. Defaults to an empty set.
Definition: configuration.h:97
std::set< PinType > control_pin_types
The pin types of the pins to be considered control pins. Defaults to an empty set.
Configuration(Netlist *nl)
Construct a new dataflow analysis configuration for the given netlist.
Configuration & with_gate_types(const std::set< const GateType * > &types, bool overwrite=false)
Add the gate types to the set of gate types to be grouped by dataflow analysis.
Configuration & with_control_pin_types(const std::set< PinType > &types, bool overwrite=false)
Set the pin types of the pins to be considered control pins by dataflow analysis.
Configuration & with_stage_identification(bool enable=true)
Enable stage identification as part of dataflow analysis.
Configuration & with_known_groups(const std::vector< Module * > &groups, bool overwrite=false)
Add modules to the set of previously identified word-level groups.
bool enforce_type_consistency
Enforce gate type consistency inside of a group. Defaults to false.
u32 min_group_size
Minimum size of a group. Smaller groups will be penalized during analysis. Defaults to 8.
Definition: configuration.h:77
Configuration & with_expected_sizes(const std::vector< u32 > &sizes)
Set the expected group sizes. Groups of these sizes will be prioritized.
std::vector< std::vector< Gate * > > known_gate_groups
Groups of gates that have already been identified as word-level groups beforehand....
Definition: configuration.h:87
Configuration & with_min_group_size(u32 size)
Set the minimum size of a group. Smaller groups will be penalized during analysis.
bool enable_stages
Enable stage identification as part of dataflow analysis. Defaults to false.
Netlist * netlist
The netlist to be analyzed.
Definition: configuration.h:72
Configuration & with_known_structures(const std::vector< Module * > &structures, bool overwrite=false)
Add modules to the set of previously identified word-level structures.