Classes
class	GuiLayoutLocker
	Suppresses layout updates of the GUI for as long as the object exists. More...

Functions
Result< u32 >	remove_unused_lut_inputs (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	remove_buffers (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	remove_redundant_gates (Netlist nl, const std::function< bool(const Gate )> &filter=nullptr, const std::vector< Gate * > &gates={})

Result< u32 >	remove_redundant_loops (Netlist *nl)

Result< u32 >	remove_redundant_logic_trees (Netlist *nl)

Result< u32 >	remove_unconnected_gates (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	remove_unconnected_nets (Netlist *nl)

Result< u32 >	remove_unconnected_looped (Netlist *nl)

Result< u32 >	manual_mux_optimizations (Netlist nl, GateLibrary mux_inv_gl)

Result< u32 >	propagate_constants (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	remove_consecutive_inverters (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	simplify_lut_inits (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	reconstruct_indexed_ff_identifiers (Netlist *nl)

Result< u32 >	reconstruct_top_module_pin_groups (Netlist *nl)

Result< std::monostate >	parse_def_file (Netlist *nl, const std::filesystem::path &def_file)

Result< std::vector< Module * > >	create_multi_bit_gate_modules (Netlist *nl, const std::map< std::string, std::map< std::string, std::vector< std::string >>> &concatenated_pin_groups)

Result< std::vector< Net * > >	create_nets_at_unconnected_pins (Netlist nl, const std::vector< Gate > &gates={})

Result< u32 >	unify_ff_outputs (Netlist nl, const std::vector< Gate > &ffs={}, GateType *inverter_type=nullptr)

Detailed Description

Simplifies a netlist before analysis, e.g., by removing unused gates and nets and by resolving redundant logic.

Function Documentation

◆ create_multi_bit_gate_modules()

Result< std::vector< Module * > > hal::netlist_preprocessing::create_multi_bit_gate_modules	(	Netlist *	nl,
		const std::map< std::string, std::map< std::string, std::vector< std::string >>> &	concatenated_pin_groups
	)

Create modules from large gates like RAMs and DSPs with the option to concatenate multiple gate pin groups into larger consecutive pin groups.

Parameters

[in]	nl	- The netlist to operate on.
[in]	concatenated_pin_groups	- A map from gate type name to a map from the name of the resulting pin group to the names of the pin groups it is concatenated from.

Returns: OK() and the created modules on success, an error otherwise.

Definition at line 2515 of file netlist_preprocessing.cpp.

References hal::Netlist::create_module(), ERR, hal::Netlist::get_gate_library(), hal::GateLibrary::get_gate_type_by_name(), hal::Netlist::get_gates(), hal::GateLibrary::get_name(), hal::Module::get_type(), net, OK, and hal::output.

Referenced by hal::PYBIND11_PLUGIN().

◆ create_nets_at_unconnected_pins()

Result< std::vector< Net * > > hal::netlist_preprocessing::create_nets_at_unconnected_pins	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Create a new net for every unconnected output pin of every gate of the netlist. The new nets are named HAL_UNCONNECTED_<net_id>.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the created nets on success, an error otherwise.

Definition at line 2583 of file netlist_preprocessing.cpp.

References hal::Netlist::create_net(), OK, and hal::Net::set_name().

Referenced by hal::PYBIND11_PLUGIN().

◆ manual_mux_optimizations()

Result< u32 > hal::netlist_preprocessing::manual_mux_optimizations	(	Netlist *	nl,
		GateLibrary *	mux_inv_gl
	)

Apply manually implemented optimizations to the netlist centered around muxes. Currently implemented optimizations include:

removing inverters incase there are inverter gates in front and behind every data input and output of the mux
optimizing and therefore unifying possible inverters preceding the select signals by resynthesizing

Parameters

[in]	nl	- The netlist to operate on.
[in]	mux_inv_gl	- A gate library only containing mux and inverter gates used for resynthesis.

Returns: OK() and the difference in the total number of gates caused by these optimizations.

Definition at line 1701 of file netlist_preprocessing.cpp.

References ERR, ERR_APPEND, and OK.

Referenced by hal::PYBIND11_PLUGIN().

◆ parse_def_file()

Result< std::monostate > hal::netlist_preprocessing::parse_def_file	(	Netlist *	nl,
		const std::filesystem::path &	def_file
	)

Parses a design exchange format file and extracts the coordinates of a placed design for each component/gate. The extracted coordinates get annotated to the gates.

Parameters

[in]	nl	- The netlist to operate on.
[in]	def_file	- Path to the def file.

Returns: OK() on success, an error otherwise.

Definition at line 2452 of file netlist_preprocessing.cpp.

References hal::data, ERR, ERR_APPEND, hal::Netlist::get_gates(), log_info, and OK.

Referenced by hal::PYBIND11_PLUGIN().

◆ propagate_constants()

Result< u32 > hal::netlist_preprocessing::propagate_constants	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Builds for all gate output nets the Boolean function and substitutes all variables connected to vcc/gnd nets with the respective boolean value. If the function simplifies to a boolean constant cut the connection to the nets destinations and directly connect it to vcc/gnd. The propagation is repeated until no further gates can be substituted, but gates outside of gates are never substituted, even if they become constant in the process.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number rerouted destinations on success, an error otherwise.

Definition at line 1739 of file netlist_preprocessing.cpp.

References hal::Net::add_destination(), hal::Netlist::delete_gate(), hal::Netlist::delete_net(), ERR, ERR_APPEND, hal::Netlist::get_gates(), hal::Netlist::get_gnd_gates(), hal::Netlist::get_vcc_gates(), log_debug, log_info, OK, and hal::BooleanFunctionDecorator::substitute_power_ground_nets().

Referenced by hal::PYBIND11_PLUGIN().

◆ reconstruct_indexed_ff_identifiers()

Result< u32 > hal::netlist_preprocessing::reconstruct_indexed_ff_identifiers ( Netlist * nl )

Tries to reconstruct a name and index for each flip flop that was part of a multi-bit wire in the verilog code. This is NOT a general netlist reverse engineering algorithm and ONLY works on synthesized netlists with names annotated by the synthesizer. This function mainly focuses netlists synthesized with yosys since yosys names the output wires of the flip flops but not the gate it self. We try to reconstruct name and index for each flip flop based on the name of its output nets.

The reconstructed indexed identifiers get annotated to the flip flop in the gate data container.

Parameters

[in] nl - The netlist to operate on.

Returns: OK() and the number of reconstructed names on success, an error otherwise.

Definition at line 2230 of file netlist_preprocessing.cpp.

References hal::data, hal::ff, hal::Netlist::get_gates(), hal::neg_state, OK, and hal::state.

Referenced by hal::PYBIND11_PLUGIN().

◆ reconstruct_top_module_pin_groups()

Result< u32 > hal::netlist_preprocessing::reconstruct_top_module_pin_groups ( Netlist * nl )

Tries to reconstruct top module pin groups via indexed pin names. This should really be done by the verilog parser, but this is at the moment not the case.

Parameters

[in] nl - The netlist to operate on

Returns: OK() and the number of reconstructed pin groups on success.

Definition at line 2268 of file netlist_preprocessing.cpp.

References hal::Module::create_pin_group(), ERR_APPEND, hal::Module::get_pins(), hal::Netlist::get_top_module(), index, OK, and pins.

Referenced by hal::PYBIND11_PLUGIN().

◆ remove_buffers()

Result< u32 > hal::netlist_preprocessing::remove_buffers	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Removes buffer gates from the netlist and connect their fan-in to their fan-out nets. Considers all combinational gates and takes their inputs into account. For example, a 2-input AND gate with one input being connected to constant 1 will also be removed.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number of removed buffers on success, an error otherwise.

Definition at line 151 of file netlist_preprocessing.cpp.

References hal::combinational, hal::NetlistModificationDecorator::connect_nets(), hal::Netlist::delete_gate(), ERR_APPEND, hal::GateType::get_boolean_functions(), hal::Gate::get_id(), hal::Net::get_id(), hal::Netlist::get_id(), hal::GateType::get_input_pin_names(), hal::Gate::get_name(), hal::Net::get_name(), hal::BasePin< T >::get_name(), hal::Endpoint::get_net(), hal::Endpoint::get_pin(), hal::BooleanFunction::get_variable_name(), hal::ground, hal::GateType::has_property(), hal::BooleanFunction::is_variable(), log_debug, log_info, log_warning, OK, hal::power, hal::Net::remove_destination(), hal::BooleanFunction::simplify_local(), and hal::BooleanFunctionDecorator::substitute_power_ground_pins().

Referenced by hal::GuiExtensionNetlistPreprocessing::execute_function(), and hal::PYBIND11_PLUGIN().

◆ remove_consecutive_inverters()

Result< u32 > hal::netlist_preprocessing::remove_consecutive_inverters	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Removes two consecutive inverters and reconnects the input of the first inverter to the output of the second one. If the first inverter has additional successors, only the second inverter is deleted. Both inverters must be contained in gates for the pair to be considered, even if only the second one ends up being deleted.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number of removed inverter gates on success, an error otherwise.

Definition at line 1855 of file netlist_preprocessing.cpp.

References hal::c_inverter, hal::Netlist::delete_gate(), hal::Netlist::delete_net(), ERR, log_warning, and OK.

Referenced by hal::PYBIND11_PLUGIN().

◆ remove_redundant_gates()

Result< u32 > hal::netlist_preprocessing::remove_redundant_gates	(	Netlist *	nl,
		const std::function< bool(const Gate *)> &	filter = `nullptr`,
		const std::vector< Gate * > &	gates = `{}`
	)

Removes redundant gates from the netlist, i.e., gates that are functionally equivalent and are connected to the same input nets. Only gates contained in gates are removed, the equivalent gate that is kept in their stead may lie outside of gates.

Parameters

[in]	nl	- The netlist to operate on.
[in]	filter	- Optional filter to fine-tune which gates are being replaced. Default to a `nullptr`.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number of removed gates on success, an error otherwise.

Definition at line 438 of file netlist_preprocessing.cpp.

References hal::SMT::Bitwuzla, hal::SMT::Library, and type.

Referenced by hal::PYBIND11_PLUGIN().

◆ remove_redundant_logic_trees()

Result< u32 > hal::netlist_preprocessing::remove_redundant_logic_trees ( Netlist * nl )

Removes redundant logic trees made up of combinational gates. If two trees compute the exact same function even if implemented with different gates we will disconnect one of the trees and afterwards clean up all dangling gates and nets.

Parameters

[in] nl - The netlist to operate on.

Returns: OK() and the number of disconnected net on success, an error otherwise.

Definition at line 975 of file netlist_preprocessing.cpp.

Referenced by hal::PYBIND11_PLUGIN().

◆ remove_redundant_loops()

Result< u32 > hal::netlist_preprocessing::remove_redundant_loops ( Netlist * nl )

Removes redundant sequential feedback loops. Sometimes flip-flops and some of their combinational fan-in form a feedback loop where the flip-flop input depends on its own output. For optimization, some synthesizers create multiple equivalent instances of these feedback loops. To simplify structural analysis, this function removes the redundant flip-flop gate of the loop from the netlist. Other preprocessing functions can then take care of the remaining combination gates of the loop.

Parameters

[in] nl - The netlist to operate on.

Returns: OK() and the number of removed gates on success, an error otherwise.

Definition at line 711 of file netlist_preprocessing.cpp.

Referenced by hal::PYBIND11_PLUGIN().

◆ remove_unconnected_gates()

Result< u32 > hal::netlist_preprocessing::remove_unconnected_gates	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Removes gates for which all fan-out nets do not have a destination and are not global output nets. The removal is repeated until no further gates can be removed, but gates outside of gates are never removed, even if they become unconnected in the process.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number of removed gates on success, an error otherwise.

Definition at line 1113 of file netlist_preprocessing.cpp.

References hal::Netlist::delete_gate(), hal::Netlist::get_id(), log_info, log_warning, and OK.

Referenced by hal::PYBIND11_PLUGIN(), and remove_unconnected_looped().

◆ remove_unconnected_looped()

Result< u32 > hal::netlist_preprocessing::remove_unconnected_looped ( Netlist * nl )

Calls remove_unconnected_gates / remove_unconnected_nets until there are no further changes.

Parameters

[in] nl - The netlist to operate on.

Returns: OK() and the number of removed nets and gates on success, an error otherwise.

Definition at line 1198 of file netlist_preprocessing.cpp.

References ERR_APPEND, OK, remove_unconnected_gates(), and remove_unconnected_nets().

Referenced by hal::PYBIND11_PLUGIN().

◆ remove_unconnected_nets()

Result< u32 > hal::netlist_preprocessing::remove_unconnected_nets ( Netlist * nl )

Removes nets who have neither a source, nor a destination.

Parameters

[in] nl - The netlist to operate on.

Returns: OK() and the number of removed nets on success, an error otherwise.

Definition at line 1168 of file netlist_preprocessing.cpp.

References hal::Netlist::delete_net(), hal::Netlist::get_id(), hal::Netlist::get_nets(), log_info, log_warning, and OK.

Referenced by hal::PYBIND11_PLUGIN(), and remove_unconnected_looped().

◆ remove_unused_lut_inputs()

Result< u32 > hal::netlist_preprocessing::remove_unused_lut_inputs	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Removes all LUT fan-in endpoints that do not correspond to a variable within the Boolean function that determines the output of a gate.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number of removed LUT endpoints on success, an error otherwise.

Definition at line 82 of file netlist_preprocessing.cpp.

References hal::Net::add_destination(), ERR, hal::Netlist::get_gnd_gates(), hal::Netlist::get_id(), log_info, log_warning, and OK.

Referenced by hal::PYBIND11_PLUGIN().

◆ simplify_lut_inits()

Result< u32 > hal::netlist_preprocessing::simplify_lut_inits	(	Netlist *	nl,
		const std::vector< Gate * > &	gates = `{}`
	)

Replaces pins connected to GND/VCC with constants and simplifies the Boolean function of a LUT by recomputing the INIT string.

Parameters

[in]	nl	- The netlist to operate on.
[in]	gates	- The gates to consider. Defaults to an empty vector, in which case all gates of the netlist are considered.

Returns: OK() and the number of simplified INIT strings on success, an error otherwise.

Definition at line 1978 of file netlist_preprocessing.cpp.

References hal::BooleanFunction::And(), ERR, ERR_APPEND, hal::Netlist::get_id(), log_info, OK, hal::BooleanFunctionDecorator::substitute_power_ground_pins(), and hal::BooleanFunction::Var().

Referenced by hal::PYBIND11_PLUGIN().

◆ unify_ff_outputs()

Result< u32 > hal::netlist_preprocessing::unify_ff_outputs	(	Netlist *	nl,
		const std::vector< Gate * > &	ffs = `{}`,
		GateType *	inverter_type = `nullptr`
	)

Iterates all flip-flops of the netlist or specified by the user. If a flip-flop has a state and a neg_state output, a new inverter gate is created and connected to the state output net as an additional destination. Finally, the neg_state output net is disconnected from the neg_state pin and re-connected to the new inverter gate's output. The new inverter gate is assigned to the module of the respective flip-flop.

Parameters

[in]	nl	- The netlist to operate on.
[in]	ffs	- The flip-flops to operate on. Defaults to an empty vector, in which case all flip-flops of the netlist are considered.
[in]	inverter_type	- The inverter gate type to use. Defaults to a `nullptr`, in which case the first inverter type found in the gate library is used.

Returns: OK() and the number of rerouted neg_state outputs on success, an error otherwise.

Definition at line 2607 of file netlist_preprocessing.cpp.

References hal::Net::add_source(), hal::c_inverter, hal::Netlist::create_gate(), hal::Netlist::create_net(), ERR, hal::ff, hal::GateType::get_gate_library(), hal::Netlist::get_gate_library(), hal::GateLibrary::get_gate_types(), hal::Netlist::get_gates(), hal::GateType::get_input_pins(), hal::GateLibrary::get_name(), hal::GateType::get_name(), hal::GateType::get_output_pins(), hal::GateType::has_property(), hal::neg_state, OK, and hal::state.

Referenced by hal::GuiExtensionNetlistPreprocessing::execute_function(), and hal::PYBIND11_PLUGIN().

Classes

Functions

Detailed Description

Function Documentation

◆ create_multi_bit_gate_modules()

◆ create_nets_at_unconnected_pins()

◆ manual_mux_optimizations()

◆ parse_def_file()

◆ propagate_constants()

◆ reconstruct_indexed_ff_identifiers()

◆ reconstruct_top_module_pin_groups()

◆ remove_buffers()

◆ remove_consecutive_inverters()

◆ remove_redundant_gates()

◆ remove_redundant_logic_trees()

◆ remove_redundant_loops()

◆ remove_unconnected_gates()

◆ remove_unconnected_looped()

◆ remove_unconnected_nets()

◆ remove_unused_lut_inputs()

◆ simplify_lut_inits()

◆ unify_ff_outputs()