HAL  v4.5.0-83-g30c8f0afc
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
netlist_simulator.cpp File Reference
#include "netlist_simulator/netlist_simulator.h"
#include "hal_core/netlist/gate_library/gate_type_component/ff_component.h"
#include "hal_core/netlist/gate_library/gate_type_component/init_component.h"
#include "hal_core/netlist/netlist.h"
#include "hal_core/utilities/log.h"
#include "netlist_simulator/simulation_utils.h"
#include "netlist_simulator_controller/simulation_input.h"
#include <algorithm>
#include <chrono>
#include <ctime>
#include <fstream>
#include <iomanip>
#include <sstream>
#include <unordered_map>
Include dependency graph for netlist_simulator.cpp:

Go to the source code of this file.

Namespaces

 hal
 

Macros

#define measure_block_time(X)
 

Macro Definition Documentation

◆ measure_block_time

#define measure_block_time (   X)

Definition at line 20 of file netlist_simulator.cpp.