HAL  v4.5.0-133-g64838ea8d
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
preprocessing.cpp File Reference
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Namespaces

 hal
 
 hal::xilinx_toolbox
 

Functions

Result< u32 > hal::xilinx_toolbox::split_luts (Netlist *nl, const std::vector< Gate * > &gates={})
 Split LUTs with two outputs into two separate LUT gates. More...
 
Result< u32 > hal::xilinx_toolbox::split_shift_registers (Netlist *nl, const std::vector< Gate * > &gates={})
 Split shift register primitives and replaces them with equivalent flip-flops chains. More...
 
Result< u32 > hal::xilinx_toolbox::remove_no_load_wires (Netlist *nl, const std::vector< Net * > &nets={})
 Remove the "no load wire" nets that Vivado writes for unused output pins. More...