HAL  v4.5.0-83-g30c8f0afc
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
hal::SimulationInput::Clock Struct Reference

#include </home/runner/work/hal/hal/plugins/simulator/netlist_simulator_controller/include/netlist_simulator_controller/simulation_input.h>

Collaboration diagram for hal::SimulationInput::Clock:
Collaboration graph

Public Member Functions

u64 period () const
 

Public Attributes

const Netclock_net
 
u64 switch_time
 
bool start_at_zero
 

Detailed Description

A clock signal, described by its net, its period, and its start value.

Definition at line 63 of file simulation_input.h.

Member Function Documentation

◆ period()

u64 hal::SimulationInput::Clock::period ( ) const
inline

Definition at line 68 of file simulation_input.h.

References switch_time.

Member Data Documentation

◆ clock_net

const Net* hal::SimulationInput::Clock::clock_net

◆ start_at_zero

bool hal::SimulationInput::Clock::start_at_zero

◆ switch_time


The documentation for this struct was generated from the following file: