HAL  v4.5.0-124-g47ab54673
The Hardware Analyzer - a comprehensive reverse engineering and manipulation framework for gate-level netlists.
templates.h
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1 // MIT License
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3 // Copyright (c) 2019 Ruhr University Bochum, Chair for Embedded Security. All Rights reserved.
4 // Copyright (c) 2019 Marc Fyrbiak, Sebastian Wallat, Max Hoffmann ("ORIGINAL AUTHORS"). All rights reserved.
5 // Copyright (c) 2021 Max Planck Institute for Security and Privacy. All Rights reserved.
6 // Copyright (c) 2021 Jörn Langheinrich, Julian Speith, Nils Albartus, René Walendy, Simon Klix ("ORIGINAL AUTHORS"). All Rights reserved.
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24 // SOFTWARE.
25 
26 #include "verilator/verilator.h"
27 
28 #include <sstream>
29 
30 namespace hal
31 {
35  namespace verilator
36  {
37  const std::string get_testbench_cpp_template()
38  {
39  const char* testbench_cpp_template = "#include \"V<design_name>.h\"\n"
40  "#include \"saleae_file.h\"\n"
41  "#include \"saleae_parser.h\"\n"
42  "#include \"saleae_directory.h\"\n"
43  "#include \"verilated_vcd_c.h\"\n"
44  "#include <iostream>\n"
45  "#include <stdlib.h>\n"
46  "#include <verilated.h>\n"
47  "\n"
48  "#include <fstream>\n"
49  "\n"
50  "#define MAX_SIM_TIME 20\n"
51  "vluint64_t sim_time = 0;\n"
52  "vluint64_t to_simulate = 0;\n"
53  "\n"
54  "V<design_name> *dut = new V<design_name>;\n"
55  "VerilatedVcdC *m_trace = new VerilatedVcdC;\n"
56  "\n"
57  "double sc_time_stamp() { return sim_time; }\n"
58  "\n"
59  "void propagate_events() {\n"
60  " dut->eval();\n"
61  " //printf(\"dut->eval();\\n\");\n"
62  " m_trace->dump(sim_time);\n"
63  " //printf(\"m_trace->dump(%d);\\n\", sim_time);\n"
64  " sim_time += to_simulate;\n"
65  " //printf(\"sim_time += %d;\\n\\n\", to_simulate);\n"
66  "}\n"
67  "\n"
68  "void set_simulation_value(void *obj, uint64_t t, int val) {\n"
69  " vluint8_t* vluintPtr = static_cast<vluint8_t*>(obj);\n"
70  " if (t != sim_time) {\n"
71  " to_simulate = t - sim_time;\n"
72  " propagate_events();\n"
73  " }\n"
74  " if (val != 0 && val != 1)\n"
75  " {\n"
76  " printf(\"error: %d\\n\", val);\n"
77  " }\n"
78  " else\n"
79  " {\n"
80  " *vluintPtr = (vluint8_t)val;\n"
81  " //printf(\"%x = 0x%d;\\n\", obj, val);\n"
82  " }\n"
83  "}\n"
84  "\n"
85  "int main(int argc, char **argv, char **env) {\n"
86  " hal::SaleaeParser sp(\"saleae/saleae.json\");\n"
87  "\n"
88  " std::unordered_map<std::string,hal::Net*> netMap;\n"
89  " for (const hal::SaleaeDirectory::ListEntry& sdle : sp.get_directory().get_net_list())\n"
90  " {\n"
91  " netMap.insert(std::make_pair(sdle.name,new hal::Net(sdle.name,sdle.id)));\n"
92  " }\n"
93  "\n"
94  " Verilated::traceEverOn(true);\n"
95  "\n"
96  " dut->trace(m_trace, 1);\n"
97  " m_trace->open(\"waveform.vcd\");\n"
98  "\n"
99  "// <set_vcc>\n"
100  "// <set_gnd>\n"
101  "\n"
102  " <set_callbacks>\n"
103  "\n"
104  "\n"
105  " int counter = 0;\n"
106  " while (sp.next_event()) {\n"
107  " counter++;\n"
108  " if (counter % 1000000 == 0) {\n"
109  " printf(\"%d\\n\", counter);\n"
110  " }\n"
111  " }\n"
112  " \n"
113  " dut->eval();\n"
114  " //printf(\"dut->eval()\\n\");\n"
115  " m_trace->dump(sim_time); // to_simulate already added in event loop\n"
116  " //printf(\"m_trace->dump(%d);\\n\", sim_time);\n"
117  " // m_trace->final();\n"
118  "\n"
119  " m_trace->close();\n"
120  " delete dut;\n"
121  " exit(EXIT_SUCCESS);\n"
122  "}\n";
123  return std::string(testbench_cpp_template);
124  }
125  } // namespace verilator
126 } // namespace hal
hal::verilator::get_testbench_cpp_template
const std::string get_testbench_cpp_template()
Definition: templates.h:37
hal
Definition: defines.h:45